1. Field of the Invention
This invention relates to the formation of integrated circuit structures. More particularly this invention relates to a process for forming a layer of dielectric material, preferably low k dielectric material, for an integrated circuit structure wherein an antireflective coating (ARC) is formed in an upper surface of the layer of dielectric material.
2. Description of the Related Art
The shrinking of integrated circuits has resulted in levels of electrically conductive interconnects being placed closer together vertically, as well as reduction of the horizontal spacing between the electrically conductive interconnects, such as metal lines, on any particular level of such interconnects. As a result, capacitance has increased between such conductive portions, resulting in loss of speed and increased cross-talk. One proposed approach to solving this problem of high capacitance is to replace the conventional silicon oxide (SiO2) dielectric material, having a dielectric constant (k) of about 4.0, with another insulation material having a lower dielectric constant to thereby lower the capacitance. In an article by L. Peters, entitled xe2x80x9cPursuing the Perfect Low-K Dielectricxe2x80x9d, published in Semiconductor International, Volume 21, No. 10, September 1998, at pages 64-74, a number of alternate dielectric materials are disclosed and discussed. Included in these dielectric materials is a description of a low k dielectric material having a dielectric constant of about 3.0 formed using a Flowfill chemical vapor deposition (CVD) process developed by Trikon Technologies of Newport, Gwent, U.K. The process is said to react methyl silane (CH3xe2x80x94SiH3) with hydrogen peroxide (H2O2) to form monosilicic acid which condenses on a cool wafer and is converted into an amorphous methyl-doped silicon oxide which is annealed at 400xc2x0 C. to remove moisture.
The above-mentioned shrinking of integrated circuits and the concurrent ever increasing demands for faster speeds, has also resulted in renewed interest in the use of copper as a filler material for vias and contact openings instead of tungsten, as well as for use in metal lines instead of aluminum because of the well known low electrical resistance of copper, compared to either aluminum or tungsten.
However, there are negative aspects to the choice of copper for via filling or in the formation of metal lines. Copper layers deposited over an integrated circuit structure cannot be easily patterned using a photoresist mask as can layers of aluminum or tungsten. As a result, copper-filled trenches and vias are formed by the damascene process wherein a layer (or layers) of dielectric material such as the aforementioned low k dielectric material is first formed over the integrated circuit structure, following which trench and via openings are formed in the dielectric material, and then the openings are filled with copper.
However, the resulting required trench and via lithography becomes complicated when conventional spin-on organic materials are used to form the antireflective coating (ARC) on the already formed integrated circuit structure required for accuracy of the lithography process used for patterning the subsequent layers of the integrated circuit structure. This is due to the process limitations of the reflective organic materials used as antireflective coatings. Problems associated with the organic films include particle generation, step coverage and trench fill for damascene applications. While inorganic materials could be used instead of such organic ARC materials, it would be more desirable to eliminate the formation and use of an additional layer solely as an ARC layer, since this requires additional steps and sometimes the use of addition apparatus (tools) requiring transfers of the substrate back and forth between different apparatus.
A process is provided for forming an integrated circuit structure characterized by formation of a combined dielectric layer and antireflective coating layer which comprises forming a layer of dielectric material over an integrated circuit structure, and treating the surface of the layer of dielectric material to form an antireflective coating (ARC) surface therein.
When a layer of photoresist is formed over the ARC surface, and the layer of photoresist is exposed to a pattern of radiation, the ARC surface improves the accuracy of the replication, in the photoresist layer, of the pattern of radiation. Preferably, the layer of dielectric material is a layer of low k dielectric material, and the surface of the dielectric layer is treated with a plasma comprising ions of elements and/or compounds.